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REMINDER Seminar, November 3, BRK 1001; 2-3:30 - Jaijeet Roychowdhury
by Anthrop, Heather L 03 Nov '16

03 Nov '16

Jaijeet Roychowdhury Electrical Engineering and Computer Science University of California, Berkeley Thursday, Nov. 3 from 2:00 – 3:30 PM Birck 1001 The Berkeley Model and Algorithm Prototyping Platform Tianshi Wang, Karthik Aadithya*, Gokcen Mahmutoglu, Archit Gupta and Jaijeet Roychowdhury. UC Berkeley and *Sandia National Laboratory Berkeley MAPP is a MATLAB-based framework for quickly prototyping device compact models and simulation algorithms. MAPP’s internal code structuring, which differs markedly from that of Berkeley SPICE and related simulators, allows users to add new devices with only minimal knowledge of simulation algorithms, and vice-versa. We provide an overview of MAPP’s modeling format ModSpec, its Verilog-A translator VAPP and its simulation capabilities. We will also briefly mention recent additions to MAPP, including memristor/RRAM models, BJT snapback models, table-based modelling capabilities, etc. MAPP is available as open source under the GNU Public License. After a short break, the second seminar will begin at 2:45 PM PHLOGON: Phase-based Logic using Oscillatory Nanosystems Tianshi Wang and Jaijeet Roychowdhury, UC Berkeley In the 1950s, Goto and von Neumann showed how Boolean computation could be performed by encoding logic states in the phase of oscillatory signals. However, the AC-pumped circuit realizations they proposed were not well suited for scaling and miniaturization, hence their scheme could not compete with the level-based logic now ubiquitous in IC implementations. We show how DC-powered self-sustaining nonlinear oscillators of practically any type can function as phase-logic latches. Phase-based Boolean computation becomes possible using a wide variety of natural and engineered oscillators (including CMOS realizations) as substrates; moreover, it features attractive energy and noise immunity properties, and is capable of running at near-THz speeds. With Moore’s Law facing fundamental barriers is an important concern, these results provide motivation for re-examining phase based logic as an alternative for the post-CMOS era. Bio: Jaijeet Roychowdhury is a Professor in the EECS Department at the University of California at Berkeley. Prior to Berkeley, he spent 8 years in Bell Labs and another 8 years at the University of Minnesota. His current research interests encompass novel computational architectures and paradigms, analog and mixed-signal verification, multi-domain device modelling and open-source infrastructures for reproducible research.

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NSAC Coffee Hour Announcement
by Anthrop, Heather L 03 Nov '16

03 Nov '16

[Inline image 1] We have NSAC Coffee Hour tomorrow at 3:30PM. Please join us in the Birck Atrium at 3:30 for Honggu Choi from Department of Physics. Speaker: Honggu Choi Title of the Talk: "Measurement of the Abraham force density on an Optical waveguide" Venue: BNC Atrium Date: 11/04/2016 Time: 3:30pm Abstract: We would like to demonstrate an optomechanical measurement scheme on the Abraham force density which has been regarded as a vanishing value over time average in optical frequency. We used Adiabatic Mode Transformation(AMT) within an optical fiber so that generated the timely measurable Abraham force density. An optical waveguide with a central hole was partially filled with high refractive index liquid, so propagating light along ring-shaped core strongly interacted with liquid and exerted pulling force upon air-liquid interface. The amount of exerted force was quantitatively measured and its amplitude showed a good agreement with the numerical estimation. While we suppressed the Abraham-Minkowski force density by minimizing electric field upon boundaries, therefore the estimated Abraham-Minkowski force density was less than 5% of the Abraham force density.

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FW: Purdue Human Library Invitation
by Turner, Jaime J 01 Nov '16

01 Nov '16

Dear Colleagues: On behalf of the Purdue Human Library planning committee, I would like to invite you to Purdue’s third Human Library event on Friday, November 4th between 10:00 AM and 3:00 PM at PMU South Ballroom. Library will be open during the lunch hours. Human Library is a civic engagement tool developed by a group of Danish activists back in 2000 in Denmark. Today the Human Library Organization<http://humanlibrary.org/> has liaisons in almost all continents. Human Library is used to challenge biases, stereotypes and prejudices in general and to celebrate diversity in all its forms. Just like a real library, in a Human Library we have books and readers, but the books are people and readers are visitors who check out ‘Books’ for a 30 min conversations. Books are people representing different backgrounds who might have experienced biases based on their religion, ethnicity, sexuality, life style, physical appearance and social status. Through our project we hope to challenge those biases by creating a communication platform between people who normally have no connection in their daily lives. The Human Library event was brought to campus in 2014 by the Krannert Women in Management program (WIM) as a way to use conversation toward building a culture that celebrates diversity in all its forms. After a three-fold growth in the number of visitors to the Human Library over the last two years, WIM, the Vice Provost for Student Life Inclusion Task Force and Purdue Libraries are joining forces to increase outreach across Purdue and the community. The following online resources from previous Purdue Human Library events may also be helpful to you: 1. Three-minute movie<https://www.youtube.com/watch?v=p3APm8jsbAs> 2. Krannert News<http://www.krannert.purdue.edu/konline/2015s/viewpoints/human_library.php> 3. JC Online News<http://www.jconline.com/story/news/college/2014/11/15/reporter-taya-flores-…> 4. JC Online News<http://www.jconline.com/story/life/2014/11/07/purdue-human-library/18657877/> 5. Purdue News<http://www.purdue.edu/newsroom/releases/2015/Q4/krannert-women-in-managemen…> 6. Purdue Exponent<http://www.purdueexponent.org/features/article_3e9cd5ac-eb66-528d-8428-3b50…> Please let me know if you have any questions. Best Regards, Senem Guler -- Senem Guler, MSHRM, MS Faculty Employment Specialist Purdue University, College of Engineering Neil Armstrong Hall, Room 2019 701 West Stadium Avenue West Lafayette, IN 47907-2045 765-494-5012 sguler(a)purdue.edu<mailto:sguler@purdue.edu> [cid:image004.png@01CE5C76.DF5AA8C0]

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Jaijeet Roychowdhury, UC Berkeley Seminars Thursday, Nov. 3rd.
by Anthrop, Heather L 31 Oct '16

31 Oct '16

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E-news for the week of October 31st
by Anthrop, Heather L 31 Oct '16

31 Oct '16

Seminar Ying Diao Thursday, December 1st at 1:30 pm Birck Nanotechnology Center room 1001 For more information please visit: https://nanohub.org/groups/bnc/calendar/details/1509 Reminder of Fume Hood Work Requirements Since Ira's retirement, there have been a number of cases of users not adhering to facility safety and cleanliness rules, particularly in the lithography hoods. As a reminder: * Chemical safety goggles are required any time you're within the yellow striped line around fume hoods * Your head should never be in a fume hood when anyone is doing wet chemistry * All solvent/developer bottles need to be returned to their proper storage location when you're finished with them, even if you didn't find them in their proper location Additional Vented Waste Can Installed As a follow-up to an input from a few weeks ago, where a user commented that the waste cans near the photolithography bay were producing unpleasant fumes, we procured a vented waste can and installed it in that area. Now there are two covered cans with exhausted vents in that bay, so please use these cans for any waste that includes photoresist and/or solvent materials so fumes may be exhausted away through the cleanroom exhaust system. Note there are still two cans in that location with no exhaust so please be sure to use those cans only for dry, non-volatile waste. Hot-Plate Exhaust Snorkels You may have noticed new snorkel-like exhaust lines installed individually over the hot plates in the aligner bay. These are connected to our house exhaust to evacuate evolved fumes from wafers being baked on the hot plates and this should alleviate the solvent scents that have occasionally been noticed in the area. Special thanks to Mike Fenters, our sheet metal tradesman who designed, fabricated, and installed the exhausted snorkels.

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CasaXPS Workshop Nov. 1-2, 2016
by Turner, Jaime J 28 Oct '16

28 Oct '16

[cid:image001.png@01D23133.61ABD530] Jaime Turner Administrative Assistant to the Director Birck Nanotechnology Center 1205 West State Street West Lafayette, IN 47907-2057 Email: jjturner(a)purdue.edu<mailto:jjturner@purdue.edu> Phone: 765-494-3509

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Fwd: NSAC Coffee Hour Announcement
by Sajid Choudhury 28 Oct '16

28 Oct '16

Just a reminder that we are having the NSAC Coffee hour now at the atrium ---------- Forwarded message ---------- From: Anthrop, Heather L <hanthrop(a)purdue.edu> Date: Thu, Oct 27, 2016 at 11:28 AM Subject: [BNC-all] NSAC Coffee Hour Announcement To: "bnc-all(a)ecn.purdue.edu" <bnc-all(a)ecn.purdue.edu> *NSAC Coffee Hour* Speaker: Evan Witkoske Title of the Talk: Nanoscale Lateral HBTs: (A Low Voltage Logic Switch?) Venue: BNC Attrium Date: 10/28/2016 Time: 3:30pm Abstract: Integrated circuit technology faces two important challenges: 1) continuing to downscale device dimensions and 2) reducing power. Given the enormous investment that has been made in the IC design infrastructure for CMOS, it would be highly desirable to develop a “drop-in replacement” for Si CMOS – one that could operate at lower voltages than Si CMOS, have better scaling properties, and that could be used in CMOS style circuits operating at the same or higher speeds. The HBT, with its absence of a thin gate dielectric, eliminates oxide scaling and electrostatic design challenges, while also allowing high turn on currents. To utilize HBTs for low-power CMOS, a small bandgap base and large bandgap emitter/collector with appropriate band offsets must be used. Parasitics must be minimized, but the major obstacle is recombination, which lead to high base currents. We show that if certain conditions are met, a low voltage, HBT with high drive currents is achievable and could serve as a drop in replacement for CMOS. _______________________________________________ BNC-all mailing list BNC-all(a)ecn.purdue.edu https://engineering.purdue.edu/ECN/mailman/listinfo/bnc-all

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John Weaver's retirement
by Peroulis, Dimitrios 27 Oct '16

27 Oct '16

Dear all, After a 45-year career, beginning with semiconductor manufacturing and evolving to nanotechnology facilities, John Weaver has elected to retire. He will be spending his retirement with his second passion, 19th Century coastal fortifications. John will be retiring effective February 17, 2017 - one day after his 67th birthday. John was instrumental in the implementation of the Birck Nanotechnology Center, leading the design, construction, startup, and operation of the facility. Please join me in thanking John for his critical contributions to our community and beyond and in wishing him the best in his retirement. We will honor John for his contributions in a farewell retirement party in February - details will be sent later. Best Dimitri ________________________________________________________________________________ Dimitrios Peroulis Professor, School of Electrical and Computer Engineering Deputy Director, Birck Nanotechnology Center Purdue University 1205 West State Street West Lafayette, IN 47907-2057 tel: (765) 494-3491 email: dperouli(a)purdue.edu<mailto:dperouli@purdue.edu> http://sites.google.com/site/peroulisteam/ ________________________________________________________________________________

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NSAC Coffee Hour Announcement
by Anthrop, Heather L 27 Oct '16

27 Oct '16

NSAC Coffee Hour Speaker: Evan Witkoske Title of the Talk: Nanoscale Lateral HBTs: (A Low Voltage Logic Switch?) Venue: BNC Attrium Date: 10/28/2016 Time: 3:30pm Abstract: Integrated circuit technology faces two important challenges: 1) continuing to downscale device dimensions and 2) reducing power. Given the enormous investment that has been made in the IC design infrastructure for CMOS, it would be highly desirable to develop a “drop-in replacement” for Si CMOS – one that could operate at lower voltages than Si CMOS, have better scaling properties, and that could be used in CMOS style circuits operating at the same or higher speeds. The HBT, with its absence of a thin gate dielectric, eliminates oxide scaling and electrostatic design challenges, while also allowing high turn on currents. To utilize HBTs for low-power CMOS, a small bandgap base and large bandgap emitter/collector with appropriate band offsets must be used. Parasitics must be minimized, but the major obstacle is recombination, which lead to high base currents. We show that if certain conditions are met, a low voltage, HBT with high drive currents is achievable and could serve as a drop in replacement for CMOS.

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FW: [Physfaculty] Notice: Condensed Matter Seminar, Friday, October 28, 2016 3:30 PM PHYS Room 203
by Black, Nancy Lee 26 Oct '16

26 Oct '16

Department of Physics and Astronomy Condensed Matter Seminar Friday October 28, 2016 3:30 PM Physics Rm 203 (Refreshments 3PM in Physics Rm 242) Professor Leo Kouwenhoven >From TU Delft University of Technology the Netherlands Experimental progress on Majoranas in semiconductors From: Manfra, Michael James Sent: Wednesday, October 26, 2016 1:27 PM To: Black, Nancy Lee <blackn(a)purdue.edu> Subject: FW: [Physfaculty] Notice: Condensed Matter Seminar, Friday, October 28, 2016 3:30 PM PHYS Room 203

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