October 2022 - Ececourtesy-list

TOMORROW, NOV. 1, CompE Seminar Series: Dr. Joanna Santos/Univ of Notre Dame: (in)Secure by Design: Challenges in Engineering Secure Software Systems
by Satterfield, Mary Ann 31 Oct '22

31 Oct '22

If you would like a one-on-one meeting with Dr. Santos, her itinerary can be found here<https://docs.google.com/document/d/131hgig874pnXExBNLrFKjrBdfdD9yo1zj5j9dz3…>. Direct any questions to Jamie Davis, davisjam(a)purdue.edu<mailto:davisjam@purdue.edu>, or Tim Rogers, timrogers(a)purdue.edu<mailto:timrogers@purdue.edu>. [cid:image001.png@01D8E954.B05D5160] Mary Ann Satterfield Sr. Administrative Assistant Elmore Family School of Electrical and Computer Engineering Electrical Engineering Building 465 Northwestern Ave., BHEE 326B West Lafayette, IN 47907 o: 765-494-6389 m: 765-490-6392 f: 765-494-2706 [BB871DD1]<https://www.purdue.edu/?utm_source=signature&utm_medium=email&utm_campaign=…>

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Upcoming Seminar by Dr. Kristof Croes
by Abrol, Sangeeta Saddul 28 Oct '22

28 Oct '22

Dear All - Please be advised of an upcoming seminar by Dr. Kristof Croes, Scientific Director, imec that might be of interest to you: Topic : Overview of semiconductor reliability topics addressed imec Date : Friday November 11, 2022 Time : 1:00pm - 2:00pm In Person: MRGN_121 Thanks, Best, Sangeeta Abrol Lead Administrative Assistant to the Director | Birck Nanotechnology Center 1205 West State St | West Lafayette, IN 47907 abrols(a)purdue.edu<mailto:abrols@purdue.edu> |purdue.edu/discoverypark/birck<http://purdue.edu/discoverypark/birck> o: 765-494 3509 | BRK 1027 [cid:image001.png@01D5E1BC.DCF172D0]

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REMINDER - Seminar by Dr. Andy Lemmon of the University of Alabama, Tuesday, Nov. 1st
by Carte, Lori J 27 Oct '22

27 Oct '22

Tuesday, November 1, 2022, 11:00am WANG 1004 Enabling Next-Generation Power Electronics With Wide Band-Gap Semiconductors Dr. Andy Lemmon Associate Professor The University of Alabama During the last ten years, the maturity of wide band-gap (WBG) semiconductor technology has advanced rapidly. The most mature WBG semiconductor available today is the Silicon Carbide (SiC) MOSFET, which is now being deployed in commercial applications on a broad scale. SiC devices offer substantial performance advantages over traditional Silicon devices in terms of reduced losses, increased switching speed, and increased thermal capability. When this technology is properly implemented, these device-level performance advantages translate into converter-level and system-level benefits, such as increased efficiency and power density. For example, WBG converters have been demonstrated at ten times higher power density than legacy Silicon converters, without sacrificing conversion efficiency. In order to achieve such performance gains, SiC-based converters must be carefully optimized to take full advantage of the underlying semiconductor capabilities. Implementation of SiC-based converters using design principles developed for Silicon devices will yield sub-optimal performance. In some cases, this may produce converters that perform worse than legacy Silicon systems. Understanding the key design principles used to optimize converters for SiC devices is critical to attaining the performance entitlement of such systems. This talk will provide an overview of the concepts that must be understood to unlock the performance advantages of SiC semiconductors at the converter level. First, the characteristics of SiC devices will be explained, along with the procedures used to evaluate and quantify device-level performance. Second, guidance for implementing these devices in practical application circuits will be presented. Third, the metrology and instrumentation requirements for properly evaluating WBG converter implementations will be discussed. Fourth, future trends will be analyzed, including the challenges and opportunities associated with the implementation of medium-voltage (MV) SiC semiconductors. Case studies will be presented throughout this talk to demonstrate the concepts discussed, and to illustrate the presence of knowledge gaps that call for further investigation. Andrew N. Lemmon received the B.S. degree in electrical engineering from Christian Brothers University, Memphis, TN, USA, in 2000; the M.S. degree in electrical and computer engineering from The University of Memphis, Memphis, TN, USA, in 2009; and the Ph.D. degree in electrical engineering from Mississippi State University, Starkville, MS, USA, in 2013. >From 2000 to 2010, he was an Embedded Systems Design Engineer at FedEx Corporation in Memphis, TN, USA. From 2010 to 2013, he was a graduate research assistant in the Center for Advanced Vehicular Systems (CAVS) at Mississippi State University. He is currently an Associate Professor with the department of electrical and computer engineering at the University of Alabama, Tuscaloosa, AL, USA. His research interests include design and optimization of Silicon Carbide applications; development of compact behavioral models for power semiconductor devices; analysis, modeling, and design of power semiconductor packaging; and analysis, modeling, and mitigation of electromagnetic interference in power electronic systems. Dr. Lemmon is a Registered Professional Engineer and has been awarded four patents.

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CompE Seminar Series: Dr. Joanna Santos/Univ of Notre Dame: (in)Secure by Design: Challenges in Engineering Secure Software Systems
by Satterfield, Mary Ann 26 Oct '22

26 Oct '22

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Pico-Seminar: Prof. Gururaj Naik, Nonlinear and Nonlocal Optical Response in Quantum Materials
by Abrol, Sangeeta Saddul 17 Oct '22

17 Oct '22

Sent on behalf of Prof. Zubin Jacob and Sathwik Bharadwaj Dear All - Please find the attached details of our next speaker, Prof. Gururaj Naik from Rice University, Houston. The talk will be live streamed and posted on our YouTube channel: https://www.youtube.com/channel/UCAwzWog7PqFw5R0q90KI6KQ Prof. Naik is an alumnus of Purdue and an expert in thermal photonics and quantum materials of tunable nanophotonics. His research group focuses on topics at the interface of quantum, nanophotonics and materials. The talk is titled "Nonlinear and Nonlocal Optical Response in Quantum Materials". Abstract and bio can be found in the attached flyer. Please join us online on Wednesday, 19th October at 11 am ET. If anyone would like to join the discussion after the seminar, please email at sdaralag(a)purdue.edu<mailto:sdaralag@purdue.edu>. Thanks! Regards, Sathwik Bharadwaj Zubin Jacob ------------------------------------------------------------------------------------------------------------------------------ Sathwik Bharadwaj Research Scientist Birck Nanotechnology Center Purdue University, West Lafayette, IN 47906 Email: sdaralag(a)purdue.edu<mailto:sdaralag@purdue.edu> ------------------------------------------------------------------------------------------------------------------------------

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Seminar by Dr. Andy Lemmon of The University of Alabama
by Carte, Lori J 11 Oct '22

11 Oct '22

DATE: Tuesday, November 1, 2022, 11:00am LOCATION: WANG 1004 Enabling Next-Generation Power Electronics With Wide Band-Gap Semiconductors Dr. Andy Lemmon Associate Professor The University of Alabama During the last ten years, the maturity of wide band-gap (WBG) semiconductor technology has advanced rapidly. The most mature WBG semiconductor available today is the Silicon Carbide (SiC) MOSFET, which is now being deployed in commercial applications on a broad scale. SiC devices offer substantial performance advantages over traditional Silicon devices in terms of reduced losses, increased switching speed, and increased thermal capability. When this technology is properly implemented, these device-level performance advantages translate into converter-level and system-level benefits, such as increased efficiency and power density. For example, WBG converters have been demonstrated at ten times higher power density than legacy Silicon converters, without sacrificing conversion efficiency. In order to achieve such performance gains, SiC-based converters must be carefully optimized to take full advantage of the underlying semiconductor capabilities. Implementation of SiC-based converters using design principles developed for Silicon devices will yield sub-optimal performance. In some cases, this may produce converters that perform worse than legacy Silicon systems. Understanding the key design principles used to optimize converters for SiC devices is critical to attaining the performance entitlement of such systems. This talk will provide an overview of the concepts that must be understood to unlock the performance advantages of SiC semiconductors at the converter level. First, the characteristics of SiC devices will be explained, along with the procedures used to evaluate and quantify device-level performance. Second, guidance for implementing these devices in practical application circuits will be presented. Third, the metrology and instrumentation requirements for properly evaluating WBG converter implementations will be discussed. Fourth, future trends will be analyzed, including the challenges and opportunities associated with the implementation of medium-voltage (MV) SiC semiconductors. Case studies will be presented throughout this talk to demonstrate the concepts discussed, and to illustrate the presence of knowledge gaps that call for further investigation. Andrew N. Lemmon received the B.S. degree in electrical engineering from Christian Brothers University, Memphis, TN, USA, in 2000; the M.S. degree in electrical and computer engineering from The University of Memphis, Memphis, TN, USA, in 2009; and the Ph.D. degree in electrical engineering from Mississippi State University, Starkville, MS, USA, in 2013. >From 2000 to 2010, he was an Embedded Systems Design Engineer at FedEx Corporation in Memphis, TN, USA. From 2010 to 2013, he was a graduate research assistant in the Center for Advanced Vehicular Systems (CAVS) at Mississippi State University. He is currently an Associate Professor with the department of electrical and computer engineering at the University of Alabama, Tuscaloosa, AL, USA. His research interests include design and optimization of Silicon Carbide applications; development of compact behavioral models for power semiconductor devices; analysis, modeling, and design of power semiconductor packaging; and analysis, modeling, and mitigation of electromagnetic interference in power electronic systems. Dr. Lemmon is a Registered Professional Engineer and has been awarded four patents.

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Reminder: Seminar - Christopher Nordquist, Sandia National Labs, Monday, 10/10, 10:30am, WANG 1004
by Jurss, Karen L 09 Oct '22

09 Oct '22

Note: this seminar will not be recorded. [Christopher Nordquist] Christopher Nordquist Sandia National Laboratories Monday, October 10, 2022 10:30am, WANG 1004 ABSTRACT Heterogeneous Integration for Next-Generation RF Microsystems. Heterogeneous Integration (HI) reduces size weight and power (SWaP) and provides high-density electrically short interconnect by eliminating the overhead of traditional packaging, thus enabling electronic microsystems to perform functions beyond that achievable with any single technology. A practical HI strategy must allow for a broad range of technologies and materials: state-of-the art electronics such as advanced node CMOS integrated circuits, specialty electronics such as compound semiconductor RF or power electronics, optoelectronic components in either silicon or compound semiconductors, microelectromechanical components, RF passives and antennas, high-density connectors, and advanced early-stage R&D prototypes in emerging technologies. In all cases, supply chain and economic realities force tradeoffs between realizing the smallest integrated microsystem with the tightest integration dimensions versus lower cost manufacturable approaches with somewhat relaxed interconnect densities. Given this diversity of materials and processes, our adaptable and scalable approach is to fabricate devices separately, through internal or external sources, followed by 2.5D integration of these devices onto high-density interposers. This approach allows access to a variety of technologies and components but is complicated by the dominance of the pure-play foundry model, prohibitive cost of full wafer runs, limited supplier options for given technologies, and small product quantities with limited learning cycles. To address some of these issues, we have been exploring single-die processing of underbump metals, interposers with solder and metal pillars for flip-chip integration, and other approaches targeting these technology sets. This presentation will start with an overview of Sandia, followed by a summary of Sandia's Microsystems capability and early-stage research activities in next-generation microsystem device technologies. Finally, the presentation will focus on RF miniaturization technology developments and a vision for an adaptable and scalable 2.5D approach for heterogeneous integration within practical limits of technology access, development costs, and turn-time. SNL is managed and operated by NTESS under DOE NNSA contract DE-NA0003525. BIO Christopher D. Nordquist received B.S., M.S., and Ph. D. degrees in electrical engineering from Penn State in 1997, 1998, and 2002. At Penn State he was a research assistant and NDSEG Fellow, where he explored technology integration using self-assembly. In 2002, he joined Sandia National Laboratories, where he is currently Distinguished Staff in the RF Microsystems Department. He researches emerging micromachined and solid-state devices, and has explored a broad range of technologies including Si, GaAs, InP, GaN, MEMS, and advanced materials. Dr. Nordquist is a Senior Member of the IEEE and has co-authored over 90 publications and 12 patents. Karen Jurss|General Operations Manager and Assistant to Dimitrios Peroulis, Michael and Katherine Birck Head Elmore Family School of Electrical and Computer Engineering Purdue University Materials and Electrical Engineering Building 501 Northwestern Avenue, Suite 150 West Lafayette, Indiana 47907 Office: (765) 494-3539 https://engineering.purdue.edu/ECE [4BEDF607] From: Jurss, Karen L <kjurss(a)purdue.edu> Sent: Tuesday, October 4, 2022 12:46 PM To: ecefaculty(a)ecn.purdue.edu; ecegradstudent-list(a)ecn.purdue.edu; Ecepostdocs-list(a)ecn.purdue.edu; ececourtesy-list(a)ecn.purdue.edu Cc: Jurss, Karen L <kjurss(a)purdue.edu> Subject: Seminar: Christopher Nordquist, Sandia National Labs, Monday, 10/10, 10:30am, WANG 1004 [Christopher Nordquist] Christopher Nordquist Sandia National Laboratories Monday, October 10, 2022 10:30am, WANG 1004 ABSTRACT Heterogeneous Integration for Next-Generation RF Microsystems. Heterogeneous Integration (HI) reduces size weight and power (SWaP) and provides high-density electrically short interconnect by eliminating the overhead of traditional packaging, thus enabling electronic microsystems to perform functions beyond that achievable with any single technology. A practical HI strategy must allow for a broad range of technologies and materials: state-of-the art electronics such as advanced node CMOS integrated circuits, specialty electronics such as compound semiconductor RF or power electronics, optoelectronic components in either silicon or compound semiconductors, microelectromechanical components, RF passives and antennas, high-density connectors, and advanced early-stage R&D prototypes in emerging technologies. In all cases, supply chain and economic realities force tradeoffs between realizing the smallest integrated microsystem with the tightest integration dimensions versus lower cost manufacturable approaches with somewhat relaxed interconnect densities. Given this diversity of materials and processes, our adaptable and scalable approach is to fabricate devices separately, through internal or external sources, followed by 2.5D integration of these devices onto high-density interposers. This approach allows access to a variety of technologies and components but is complicated by the dominance of the pure-play foundry model, prohibitive cost of full wafer runs, limited supplier options for given technologies, and small product quantities with limited learning cycles. To address some of these issues, we have been exploring single-die processing of underbump metals, interposers with solder and metal pillars for flip-chip integration, and other approaches targeting these technology sets. This presentation will start with an overview of Sandia, followed by a summary of Sandia's Microsystems capability and early-stage research activities in next-generation microsystem device technologies. Finally, the presentation will focus on RF miniaturization technology developments and a vision for an adaptable and scalable 2.5D approach for heterogeneous integration within practical limits of technology access, development costs, and turn-time. SNL is managed and operated by NTESS under DOE NNSA contract DE-NA0003525. BIO Christopher D. Nordquist received B.S., M.S., and Ph. D. degrees in electrical engineering from Penn State in 1997, 1998, and 2002. At Penn State he was a research assistant and NDSEG Fellow, where he explored technology integration using self-assembly. In 2002, he joined Sandia National Laboratories, where he is currently Distinguished Staff in the RF Microsystems Department. He researches emerging micromachined and solid-state devices, and has explored a broad range of technologies including Si, GaAs, InP, GaN, MEMS, and advanced materials. Dr. Nordquist is a Senior Member of the IEEE and has co-authored over 90 publications and 12 patents. Karen Jurss|General Operations Manager and Assistant to Dimitrios Peroulis, Michael and Katherine Birck Head Elmore Family School of Electrical and Computer Engineering Purdue University Materials and Electrical Engineering Building 501 Northwestern Avenue, Suite 150 West Lafayette, Indiana 47907 Office: (765) 494-3539 https://engineering.purdue.edu/ECE [4BEDF607]

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Seminar: Christopher Nordquist, Sandia National Labs, Monday, 10/10, 10:30am, WANG 1004
by Jurss, Karen L 04 Oct '22

04 Oct '22

[Christopher Nordquist] Christopher Nordquist Sandia National Laboratories Monday, October 10, 2022 10:30am, WANG 1004 ABSTRACT Heterogeneous Integration for Next-Generation RF Microsystems. Heterogeneous Integration (HI) reduces size weight and power (SWaP) and provides high-density electrically short interconnect by eliminating the overhead of traditional packaging, thus enabling electronic microsystems to perform functions beyond that achievable with any single technology. A practical HI strategy must allow for a broad range of technologies and materials: state-of-the art electronics such as advanced node CMOS integrated circuits, specialty electronics such as compound semiconductor RF or power electronics, optoelectronic components in either silicon or compound semiconductors, microelectromechanical components, RF passives and antennas, high-density connectors, and advanced early-stage R&D prototypes in emerging technologies. In all cases, supply chain and economic realities force tradeoffs between realizing the smallest integrated microsystem with the tightest integration dimensions versus lower cost manufacturable approaches with somewhat relaxed interconnect densities. Given this diversity of materials and processes, our adaptable and scalable approach is to fabricate devices separately, through internal or external sources, followed by 2.5D integration of these devices onto high-density interposers. This approach allows access to a variety of technologies and components but is complicated by the dominance of the pure-play foundry model, prohibitive cost of full wafer runs, limited supplier options for given technologies, and small product quantities with limited learning cycles. To address some of these issues, we have been exploring single-die processing of underbump metals, interposers with solder and metal pillars for flip-chip integration, and other approaches targeting these technology sets. This presentation will start with an overview of Sandia, followed by a summary of Sandia's Microsystems capability and early-stage research activities in next-generation microsystem device technologies. Finally, the presentation will focus on RF miniaturization technology developments and a vision for an adaptable and scalable 2.5D approach for heterogeneous integration within practical limits of technology access, development costs, and turn-time. SNL is managed and operated by NTESS under DOE NNSA contract DE-NA0003525. BIO Christopher D. Nordquist received B.S., M.S., and Ph. D. degrees in electrical engineering from Penn State in 1997, 1998, and 2002. At Penn State he was a research assistant and NDSEG Fellow, where he explored technology integration using self-assembly. In 2002, he joined Sandia National Laboratories, where he is currently Distinguished Staff in the RF Microsystems Department. He researches emerging micromachined and solid-state devices, and has explored a broad range of technologies including Si, GaAs, InP, GaN, MEMS, and advanced materials. Dr. Nordquist is a Senior Member of the IEEE and has co-authored over 90 publications and 12 patents. Karen Jurss|General Operations Manager and Assistant to Dimitrios Peroulis, Michael and Katherine Birck Head Elmore Family School of Electrical and Computer Engineering Purdue University Materials and Electrical Engineering Building 501 Northwestern Avenue, Suite 150 West Lafayette, Indiana 47907 Office: (765) 494-3539 https://engineering.purdue.edu/ECE [4BEDF607]

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Guest Speaker Seminar: "Physics-Based Visual Computing for Efficient 3D Vision and Sensing", David B. Lindell (University of Toronto), Tuesday, October 11 at 12PM, Virtual
by Hodges, Kendra Renee 03 Oct '22

03 Oct '22

[cid:image002.png@01D8D73A.AED3C9E0] Kendra Hodges | Administrative Assistant Elmore Family School of Electrical and Computer Engineering Purdue University Materials and Electrical Engineering Building 501 Northwestern Avenue, Suite 150 West Lafayette, Indiana 47907 Phone: 765-494-3540 Email: khodges(a)purdue.edu [download]

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Guest Speaker Seminar: "Deceptive Planning for Supervised Autonomous Agents", Mustafa Karabag (University of Texas at Austin), Wednesday, October 5 at 10:30AM, BHEE 317
by Hodges, Kendra Renee 03 Oct '22

03 Oct '22

[cid:image002.png@01D8D70E.E2DB3380] Zoom link: https://purdue-edu.zoom.us/j/94546264748?pwd=MlF5ampZRzdwV2lNS3JCM3RJSmxYZz… Kendra Hodges | Administrative Assistant Elmore Family School of Electrical and Computer Engineering Purdue University Materials and Electrical Engineering Building 501 Northwestern Avenue, Suite 150 West Lafayette, Indiana 47907 Phone: 765-494-3540 Email: khodges(a)purdue.edu [download]

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