Fwd: NCN Student Seminar Tomorrow (Feb 13 at 11:30am in EE350)
Please check out the information below about the NCN Student Seminar series starting from 2/13/2009 (Friday). Thanks. ------------------- Greetings! The NCN-SLC at Purdue is pleased to announce the first seminar in the NCN Student Seminar series for Spring 2009 and you are invited! The seminar will take place at 11:30am on Friday, Feb 13, 2009 in EE 350 conference room. Our speaker is Mr. Pradeep Nair from Prof. Alam's group. He will present about his research on “Cantor Transforms for Random Systems”. Here is a short abstract of the talk: Cantor Transforms for Random Systems: -------------------------------------------------- Systems based on random or disordered materials form a major focus of emerging technologies like Energy conversion and storage, Healthcare, etc. Although far from being ordered, as compared to crystals, many of these materials exhibit order in some aspects. In this talk we show that there exist unique methods of analysis for such systems with remarkable results. We address a technologically relevant problem- transient diffusion towards scale invariant surfaces and then explore the fundamental idea of finiteness of natural objects. -------------------- Important reminders: 1) Free pizza will be provided at this seminar on first come first serve basis. 2) If you are interested in speaking at one of the seminars for Sprint 2009, please send an email to ncn.slc.amrit@gmail.com or at aeislam@ieee.org 3) All NCN students are invited. Please help to pass the word about the seminar to an NCN friend who is not on students@nanohub mailing list. Regards, -- Li, Fengyuan (Thomas), Ph.D. Student Research & Teaching Assistant School of Mechanical Engineering Birck Nanotechnology Center Purdue University 1205 W.State St,West Lafayette,IN,USA,47907 Email: li200@purdue.edu .OR. fengyuan.t.li@gmail.com
Dear all, I will be taking my prelim on Feb 17, 2009 (Tuesday) at 10:00AM in EE317. You are all cordially invited to attend. Thanks. Title: ------ Theory and Characterization of Random Defect Formation and Its Implication in Variability of Nanoscale Transistors Abstract: ------------ With miniaturization of MOS transistors following Moore's law, oxide electric field under normal operation has continuously increased with each technology. Increasing oxide electric field does improve drive current and therefore the initial, time-zero, performance, however such high oxide electric field also strains the chemical bonds at the oxide/substrate interface and degrades transistor parameters over time. In addition, the incorporation of high-κ materials (like silicon oxynitride and hafnium-based materials) within the gate stack makes these transistors susceptible to trapping within the bulk of the dielectric (e.g., electron trapping for NMOS and hole trapping for PMOS). Taken together, these two phenomena cause rapid and time-dependent shift in threshold voltage (along with change in mobility, sub-threshold slope, etc.) in MOS transistors. This instability of threshold voltage - often referred to as Bias Temperature Instability or BTI - has become one of the major sources of CMOS variability in recent years. In addition to this defect-related phenomena, threshold voltage in small-scale transistors can also vary due to statistical process-related fluctuations. This thesis is focused on developing the theoretical framework and characterization techniques of BTI in PMOS transistors - generally known as Negative Bias Temperature Instability (NBTI) - by analyzing its functional dependencies over time, supply voltage, temperature, materials within the dielectric, and channel strain. This comprehensive analysis would allow identification of different features in modern NBTI characteristics. We recognize both interface trap and hole trapping as contributing factors for NBTI in modern CMOS technology. In some transistors, NBTI is dominated by interface traps and the mechanics of NBTI is modeled within an analytically tractable Reaction-Diffusion framework and compared with characteristic experimental signatures. In other transistors, hole trapping dominate and generalized Shockley-Read-Hall framework is used to model the kinetics of hole trapping in oxide traps. Taken together, this comprehensive theoretical framework - supported by detailed experiments - lead to a truly exciting possibility of the design of a variation-resilient transistor technology for CMOS architecture, a possibility - if demonstrated and adopted - may reshape how CMOS circuits are designed for handling major sources of threshold voltage fluctuations. ------------------------ Ehtesham ECE, Purdue University http://web.ics.purdue.edu/~aeislam
participants (2)
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Ehtesham Islam -
Li, Fengyuan (Thomas)