Seminars /Workshops / Events
2021 Birck Nanotechnology Center Research Image Contest
Sponsored by NSAC and Birck leadership - $600 in prize awards for student entries
Please share your research images which showcase the beauty you’ve observed around you at Birck! All members of the Birck community – students, staff, and faculty – are welcome to submit their images that can include not only research images
but also photos of life here at Birck. For research images, we ask that you also write a short paragraph explaining what we are looking at and why it is significant to you.
We will assemble a panel of judges and announce awards at the BNC Holiday Party in December, and
student entries are eligible to win:
$300 for 1st place $200 for 2nd place $100 for 3rd place
You can submit multiple images anytime by tomorrow and November 30, 2021 to a new MS Teams channel we have set up for the image contest, see link below:
If you have issues or questions, please email Neil Dilley at
ndilley@purdue.edu .
Happy image hunting!
and the Birck Nanotechnology Center
Practical Aspects of XPS:
Dear Colleagues,
I just would like to announce that a new XPS workshop "Practical aspects of XPS: from sample preparation to spectra interpretations" has been scheduled on December 7-9, 2021at 9 am - 1 pm. Every research group using or planning
to use Surface Analysis characterization tools should have at least one trained student.
Course Description: XPS is widely used to determine the chemical composition of a surface (element concentrations, chemical states, lateral and depth distributions, etc.). Nowadays XPS has become a standard technique for the characterization
of solid surfaces. The course will teach how and what information can be provided by XPS. The quantification of the XPS data will be discussed in detail (thickness calculation, coverage, atomic percentage, etc.)
Registration is at https://forms.gle/B7xjCHWADG9yVmTk6.
Cost is $250.
Please let me know if you have any questions. Thank you!
Best regards,
Dmitry Zemlyanov, PhD
Senior Research Scientist - Surface Science Application
Purdue University Birck Nanotechnology Center,
1205 West State Street, West Lafayette, IN 47907-2057
Tel.: +1 (765) 496-2457 (office - BRK 1274)
+1 (765) 496-6217 (lab - BRK 1077)
Cell: +1 (765) 427-3813
Fax: +1 (765) 496-8299
mailto:dzemlian@purdue.edu
web: https://www.purdue.edu/discoverypark/birck/facilities/equipment/Characterization/Surface-Characterization/Kratos%20X-ray%20Photoelectron%20Spectrometer.php
Mask Protocols in the Cleanroom
We have observed various masking practices in the cleanroom recently so as a reminder for those using our Birck cleanroom, please continue to follow our COVID mask protocols. Masking requirements are either to use an M3 N95 mask by itself
or use a standard mask under the cleanroom veil. If you have any questions please contact a staff member.
Thanks,
Ron
Birck Engineering
JOB POSTINGS:
R&D Senior Design Engineer at Alpha & Omega Semiconductor
Alpha & Omega Semiconductor is looking for a Senior Design Engineer who will work in a dynamic team environment at AOS headquarter located in Sunnyvale, CA. The main responsibility of this position is to work
with marketing/process integration/product engineering group to develop silicon power device technology.
Application link:
Senior Design Engineer - Sunnyvale, CA - Alpha & Omega Semiconductor Jobs (applicantpro.com)
R&D Senior Process Integration Engineer at Alpha & Omega Semiconductor
Alpha & Omega Semiconductor is looking for a
Senior Process Integration Engineer who will work in a
dynamic team environment at AOS Semiconductor's leading technology fabrication facility (Jireh Semiconductor) located in Hillsboro, Oregon. The focus of this position is to work with device/process module/product engineering group to develop silicon power device
process technology and improve existing technology yield. Primary responsibilities are to process flow implementation, electrical characterization (failure analysis), and wafer level testing yield monitoring.
Application link:
Entry Level MS or PHD Process Integration R&D Engineer - Hillsboro, OR - Jireh Semiconductor Jobs (applicantpro.com)
Opening in OxideMEMS lab
Sunil Bhave’s OxideMEMS Lab explores inter-domain coupling in Opto-mechanical, Spin-Acoustic and Atom-MEMS devices. PhD, Postdoctoral and Research Associate positions
are available in these areas:
· Superconducting qubit and cryo-CMOS circuits
· Resonators and switches
· MEMS-engine for LIDAR
· Piezo-on-nitride transducers for atom-mechanics
Expertise in many and most of Microfabrication, PiezoMEMS, Photonics, Quantum Mechanics, Microwave circuits, PCB design, ADS/HFSS, Comsol, Python and Labview is required.
Please send CV to bhave@purdue.edu if you are
interested.link
Nanofabrication Engineer at Microsoft
Microsoft Azure Quantum at Station Q Purdue seeks a nanofabrication engineer in the device fabrication group. You will join a multi-disciplinary team of theoretical
and experimental physicists, materials scientists, and hardware and software engineers working at the forefront of quantum computing. You should have experience in device fabrication and characterization techniques. Our work at Station Q Purdue in West Lafayette,
Indiana is part of global Microsoft Quantum research effort in topological quantum computing.
Responsibilities:
Responsibilities include develop, operate, and characterize semiconductor device fabrication processes in the Birck Nanotechnology Center cleanroom facilities located
at Purdue University. Accurately documenting and effectively communicating all procedures and results to the larger research group is an essential aspect of the position. The candidate may also be required to assist in the maintenance of equipment.
Qualifications:
A successful candidate must have:
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• Master’s degree in Physics, Materials Science or Electrical Engineering. Other engineering disciplines will also be considered.
•
• Hands-on experience working with some or all of the following semiconductor process areas: lithography, thin film deposition and etch.
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• Ability to follow protocols to operate sophisticated experimental equipment and to safely work with industrial solvents, acids, and bases in a cleanroom environment
•
• Excellent written and oral communication skills.
•
• Proficiency at accurately documenting processes and protocols.
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• Strong attention to detail and good organizational skills.
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• Strong desire to work in a collaborative international team.
Preference may be given to candidates with the following additional qualifications:
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• Industry experience in semiconductor device process integration.
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• Expertise in thin film characterization, both structural and electrical.
•
• Familiarity with design and layout tools for chip scale devices.
Please send your resume to
flgriggi@microsoft.com, selected candidates will be contacted for interviews.
NSAC Fab Forum
There will be no NSAC Fab Forum this Tuesday
NSAC Coffee Hour
There will be no NSAC Coffee Hour this Friday
Birck Nanotechnology Center Advanced Capabilities
Omicron Surface Analysis Cluster
(tool as named on the BNC Wiki)
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Plasma-Therm Apex HDPCVD SLR |
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(High Density Plasma Chemical Vapor Deposition) |
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Deposition Capabilities: |
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Silicon Dioxide (170°C, SiH4/O2/Ar) |
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Silicon Nitride (150°C, SiH4/N2/Ar) |
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Amorphous Silicon (170°C, SiH4/Ar) |
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Silicon Carbide (Future Capability) |
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Features: |
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Lower Temperatures (10-170°C) |
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Ammonia-Free Nitride |
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Fast! (100nm/min SiO2) |
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Highly Automated (Load/Start/Unload) |
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600W Bias, 1000W ICP Power Supplies |
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4” Wafer Size |
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Location: Cleanroom R Bay |
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***To post an announcement in the weekly BNC E-news please send to
Sangeeta Abrol @ abrols@purdue.edu***
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