Final Exam NSAC Tip of the Week University Holiday Final Exam Saumitra Mehrota Monday, November 25th Birck 2001 at 9:00 am Physics and Simulation Study of Nanoscale Electronic Devices Silicon based complementary metal-oxide-semiconductor (CMOS) technology has seen continuous scaling of device dimensions for past three decades. There is a lot of focus on incorporating different high mobility channel materials and new device architectures for post-Si CMOS logic technology, making it a multifaceted problem. In this thesis the multiple challenges concerning new CMOS technologies are addressed. (1) High electron mobility III-V's are projected to be a material of choice for post-Si CMOS logic. These low electron mass materials suffer from the 'DOS bottleneck' issue. Transistor designs based on using mixed Γ-L valleys for electron transport are proposed to overcome the density of states (DOS) bottleneck. Improved current density over Si is demonstrated in GaAs/AlAsSb, GaSb/AlAsSb, and Ge-oninsulator-based single gate thin-body n-channel transistors. (2) Ge is a candidate material for p-channel transistors. Nano patterning of Ge/SiGe leads to Ge nanofins with both uniaxial and biaxial strain components, making it a device architecture design problem. Fully atomistic simulations involving molecular dynamics based relaxation for strain relaxation; tight-binding based bandstructure calculations and a linearized Boltzmann transport model for mobility calculations are performed. Final phonon mobility calculations reveal nearly 3.5 X improvements compared to biaxial strained Ge in Ge nanofins with width reduction.(3) Finally, a critical question that has to do with scaling is - How small a useful MOS transistor can be? As transistor channel lengths (Lg) are scaled to lengths shorter than Lg<8 nm, direct source-drain tunneling starts to limit the transistor operation. The scaling approaches needed in this tunneling dominated regime are presented using atomistic quantum mechanical simulations. NSAC Tip of the Week Clothing and PPE. + Enclosed Shoes + Long Pants or Skirt + Safety Glasses required in all Labs Except non Hood use Labs. University Holiday Purdue University will be closed Thursday, November 28th and Friday, November 29th in observance of the Thanksgiving holiday.