Just a reminder that we are having the NSAC Coffee hour now at the atrium ---------- Forwarded message ---------- From: Anthrop, Heather L <hanthrop@purdue.edu> Date: Thu, Oct 27, 2016 at 11:28 AM Subject: [BNC-all] NSAC Coffee Hour Announcement To: "bnc-all@ecn.purdue.edu" <bnc-all@ecn.purdue.edu> *NSAC Coffee Hour* Speaker: Evan Witkoske Title of the Talk: Nanoscale Lateral HBTs: (A Low Voltage Logic Switch?) Venue: BNC Attrium Date: 10/28/2016 Time: 3:30pm Abstract: Integrated circuit technology faces two important challenges: 1) continuing to downscale device dimensions and 2) reducing power. Given the enormous investment that has been made in the IC design infrastructure for CMOS, it would be highly desirable to develop a “drop-in replacement” for Si CMOS – one that could operate at lower voltages than Si CMOS, have better scaling properties, and that could be used in CMOS style circuits operating at the same or higher speeds. The HBT, with its absence of a thin gate dielectric, eliminates oxide scaling and electrostatic design challenges, while also allowing high turn on currents. To utilize HBTs for low-power CMOS, a small bandgap base and large bandgap emitter/collector with appropriate band offsets must be used. Parasitics must be minimized, but the major obstacle is recombination, which lead to high base currents. We show that if certain conditions are met, a low voltage, HBT with high drive currents is achievable and could serve as a drop in replacement for CMOS. _______________________________________________ BNC-all mailing list BNC-all@ecn.purdue.edu https://engineering.purdue.edu/ECN/mailman/listinfo/bnc-all